Basal plane dislocations (BPDs) represent one of the most detrimental defects in 4H-SiC epitaxial wafers, causing forward voltage degradation in bipolar and power FET devices through the formation and expansion of Shockley-type stacking faults (SSFs). This expansion is driven by the recombination-enhanced dislocation glide (REDG) mechanism during forward bias operation. Despite efforts to mitigate BPD effects by converting them into threading edge dislocations (TEDs) via buffer layer engineering, throughout the epitaxial growth SSFs can still nucleate and propagate, particularly under high current injection. This work presents a comprehensive analysis combining electrical characterization, fault localization technique, Scanning Electron Microscopy (SEM) and micro-photoluminescence (μ-PL) to investigate SSF formation, crystallographic features, and their impact on device performance. The results underscore the critical role of advanced diagnostics and epitaxial process optimization in controlling SSF-related degradation and improving the reliability of SiC power devices.